1. Field of the Invention
The present invention relates to a capacitor used in a dynamic random access memory (DRAM) device and a method for manufacturing such a capacitor.
2. Description of the Related Art
Generally, a typical memory cell of a DRAM device is formed by one switching metal oxide semiconductor (MOS) transistor and one capacitor for storing information. Also, this capacitor is a so-called stacked capacitor including a lower capacitor electrode, an upper capacitor electrode and a capacitor insulating layer therebetween.
A prior art stacked capacitor is constructed by a cylindrical lower capacitor electrode layer so as to enhance the capacity of the stacked capacitor. Also, in order to reduce the electric resistance to enhance the operation speed, the lower capacitor electrode layer is made of metal or metal compound such as tungsten (W) or titanium nitride (TiN). This structure is called a metal insulator metal (MIM) structure. This prior art stacked capacitor will be explained later in detail.
In the above-described prior art stacked capacitor, however, since the surfaces of the cylindrical capacitor electrode layer are flat, it is difficult to increase the capacity as a result of the ongoing trend of miniaturization.